14th IEEE / ACM International Symposium on Nanoscale Architectures

18-19 July 2018

Athens, Greece


About NANOARCH 2018

NANOARCH is the annual cross-disciplinary forum for the discussion of novel post-CMOS and advanced nanoscale CMOS directions. The symposium seeks papers on innovative ideas for solutions to the principal challenge faced by integrated electronics in the 21st century: How to design, fabricate, and integrate nanosystems to overcome the fundamental CMOS limitations? In particular, such systems could:

  •  Contain unconventional nanodevices with unique capabilities, e.g., beyond simple switch behavior
  •  Introduce new logic and memory concepts
  •  Involve novel circuit styles
  •  Introduce new computing concepts
  •  Explore security architectures with nanotechnology
  •  Reconfigure and/or mask faults at much higher rates than in CMOS
  •  Require design tools and methodologies fundamental rethinking


Call for Papers

This 14th symposium aims to incorporate several exciting sessions on emerging computing paradigms (e.g., approximate, quantum, neuromorphic, molecular, spintronic), novel nano-based computing architectures, 2D materials (e.g., graphene) nanoelectronics and computing, beyond charge-based computing, emerging memory devices and in memory computing, nanoelectronics for biomedical systems, and to provide extended opportunities for interaction among the participants. In addition to 6-page length Regular Papers, we also invite 2-page Concept Papers presenting less developed but radical and highly innovative work in the area of nanofabrication, nanocomputing, and emerging nanosystem application.

NANOARCH 2018 topics of interest (both theoretical and experimental) include (but are not limited to):

  •  Novel nanodevices and manufacturing/integration ideas with a focus on nanoarchitectures
  •  Nanoelectronic circuits, nanofabrics, computing paradigms and nanoarchitectures
  •  Future and emergent nano-computing paradigms, e.g., approximate, quantum, neuromorphic, molecular, spintronic
  •  Paradigms and nanoarchitectures for computing with unpredictable devices
  •  Emerging memory nano-devices and in memory computing nano-architectures
  •  Security architectures with nanofabrics
  •  Reliability aware computing
  •  2D/3D, hybrid, defect/fault tolerant architecture, integration, and manufacturing
  •  Nanodevice and nanocircuit models, methodologies and computer aided design tools
  •  Fundamental limits of computing at the nanoscale

Significant Dates

Special Session Proposals due: March 5, 2018

Special Session Notification of Acceptance: March 15, 2018

Regular / Special Session Paper Submission: April 5, 2018

Acceptance Notification: May 28, 2018

Final Version: June 11, 2018

Early Registration Deadline: June 11, 2018

Special Session Call

The NANOARCH 2018 technical program will include Special Sessions. Their objective is to complement the regular program with new or emerging topics that are of particular interest to practitioners and experts for highest performance at nanoscale architectures that may also cut across and beyond disciplines traditionally represented at NANOARCH.

We recall that, typically, each Special Session comprises at least 5 presentations. Prospective organizers of Special Sessions should submit proposals delivering the following:

  • Topic Title (approx. 10 words)
  • Organizers Name and Affiliation
  • Session Rationale and Outline (approx. 500 words); the rationale should stress the novelty of the topic and/or its multidisciplinary features (if any)
  • Session Paper List (min. 5 papers without more than 2 per involved research group) including the author(s) affiliation(s), paper title and abstract (approx. 100-200 words)

Proposals will be evaluated based on the timeliness of the topic, and the qualifications of organizers and contributors.

After Special Session proposals are approved, manuscripts may be submitted to the special sessions and should conform to the formatting and electronic submission guidelines of regular NANOARCH papers. The invited papers, which are part of accepted special sessions proposals, will undergo the same review process as Regular and Concept papers. If, at the end of the review process, fewer than four (4) papers are accepted, the session will be cancelled and the accepted papers will be moved to regular sessions.

Proposals should be sent via e-mail to the Special Session Chair by March 5, 2018 at the latest.

Submission Guidelines

Authors are invited to submit of up to 6 pages in length for the Regular Paper Sessions and Special Sessions and 2 pages in length for the Concept Paper Sessions in PDF version, double column, IEEE format, with a minimum font size of 10 points on the symposium submission website (EasyChair). Author may choose to make submissions anonymous, although that is not mandatory. The electronic submission will be considered evidence that upon acceptance, the author(s) will present their paper at the symposium. Accepted and presented papers will be submitted for inclusion to IEEE Xplore. All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript of novel unpublished work (not to exceed 6 pages of single spaced text, including figures and tables).

Accepted papers will be considered for NANOARCH Best Paper Award, and the conference content will be submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing (A&I) databases.

After the conference, authors are invited to submit extended paper versions (containing at least 30% but preferably 50% new material), to pass the normal review process, for potential publication in an IEEE Transactions on Nanotechnology NANOARCH 2018 Special issue.

Technical Committee

Mustafa Altun, Istanbul Technical University

Csaba Andras-Moritz, UMass Amherst

Lorena Anghel, Phelma Grenoble INP, TIMA Laboratory

Swarup Bhunia, University of Florida

Pierre Boulet, University Lille 1

Meng-Fan Chang, National Tsing Hua University

Yiran Chen, Duke University

Fabien Clermidy, CEA-Leti

Sorin Cotofana, Technische Universiteit Delft, The Netherlands

Shamik Das, The MITRE Corporation

Catherine Dezan, UBO/Lab-STICC

Joseph Friedman, The University of Texas at Dallas

Pierre-Emmanuel Gaillardon, University of Utah

Bastien Giraud, CEA-Leti

Jie Han, University of Alberta

Andreas Herkersdorf, Technical University of Munich

Daniel Ielmini, Politecnico di Milano

Jacques-Olivier Klein, Institut d'Electronique Fondamentale

Sebastien Le-Beux, Lyon Institute of Nanotechnology (INL)

Bernabe Linares-Barranco, IMSE-CNM (CSIC & Univ. of Seville)

Weiqiang Liu, Nanjing University of Aeronautics and Astronautics

Marisa Lopez-Vallejo, Universidad Politécnica de Madrid

Kartik Mohanram, University of Pittsburgh

Anca Molnos, CEA-LETI, France

Kundan Nepal, University of St Thomas

Michael Niemier, University of Notre Dame

Fabrizio Lombardi, Northeastern University, USA

Ian O'Connor, Lyon Institute of Nanotechnology

Marco Ottavi, University of Rome "Tor Vergata"

Damien Querlioz, IEF, University Paris-Sud

Garrett Rose, University of Tennessee

Daniele Rossi, University of Hertfordshire

Antonio Rubio, Universitat Politecnica de Catalunya, Spain

Georgios Ch. Sirakoulis, Democritus University of Thrace, Greece

Mircea Stan, University of Virginia

Adam Stieg, University of California, Los Angeles

Lionel Torres, LIRMM

Amit Trivedi, University of Illinois at Chicago

Lucian Vintan, "Lucian Blaga" University of Sibiu

Ioannis Vourkas, Universidad Técnica Federico Santa María

Alex Yakolev, University of Newcastle

Conference Time-schedule

Conference program to be announced

Keynote Speakers

Keynote speakers to be announced


Please read carefully the instructions before starting the registration process.

Registration Fee (Euros)

Category Before
Full registration (IEEE Members) (TBA) (TBA)
Full registration (Non IEEE Members) (TBA) (TBA)
*Student registration (IEEE Members) (TBA) (TBA)
*Student registration (Non IEEE Members) (TBA) (TBA)
Extra conference material (bug, usb, certificate) (TBA) (TBA)
Extra conference dinner ticket (participation to the trip) (TBA) (TBA)

*Proof of student status is required

Important notes:
Full Registration and Student Registration fee as well as Design contest registration and PhD Forum registration includes:
  •  Access to the conference and paper presentation
  •  Conference bag, USB with the proceedings and certificate of attendance
  •  Coffee breaks, lunches and conference dinner

One full or student registration corresponds to the participation of one person who can present one or two papers. A third paper requires another registration.

Author registration and payment should be completed before (TBA) in order for the manuscript to be included in the NANOARCH 2018 Proceedings. Only accepted and presented papers will be included in Conference proceedings. REMEMBER: a signed IEEE Copyright Form is needed for each paper (you can find it in the PAPER SUBMISSION area). Also, you have to check the final version of your paper with IEEE PDF eXpress.

For any inquiry please email Registration Char at: Ioannis Vourkas, Vasileios Ntinas or phone at: (TBA)

Payment methods:
1. On-line registration

2. Via Bank transfer

Invoice Request
In case of a via bank transfer if an invoice is to be issued, email your request and details at (TBA)